{"id":2448,"date":"2020-12-30T18:30:39","date_gmt":"2020-12-30T09:00:39","guid":{"rendered":"https:\/\/nirasystem.com\/niraplus\/?p=2448"},"modified":"2021-10-03T21:17:55","modified_gmt":"2021-10-03T11:47:55","slug":"%d8%ac%d8%b4%d9%86%d9%88%d8%a7%d8%b1%d9%87-%d8%b2%d9%85%d8%b3%d8%aa%d8%a7%d9%86%db%8c-_-%d9%81%d8%b5%d9%84-%db%8c%d8%a7%d8%af%da%af%db%8c%d8%b1%db%8c","status":"publish","type":"post","link":"https:\/\/nirasystem.com\/blog\/%d8%ac%d8%b4%d9%86%d9%88%d8%a7%d8%b1%d9%87-%d8%b2%d9%85%d8%b3%d8%aa%d8%a7%d9%86%db%8c-_-%d9%81%d8%b5%d9%84-%db%8c%d8%a7%d8%af%da%af%db%8c%d8%b1%db%8c\/","title":{"rendered":"\u062c\u0634\u0646\u0648\u0627\u0631\u0647 \u0632\u0645\u0633\u062a\u0627\u0646\u06cc _ \u0641\u0635\u0644 \u06cc\u0627\u062f\u06af\u06cc\u0631\u06cc"},"content":{"rendered":"

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\u06a9\u062f \u062a\u062e\u0641\u06cc\u0641: win05<\/strong><\/p>\n

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\u06a9\u062f \u062a\u062e\u0641\u06cc\u0641: win10<\/strong><\/p>\n

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\u06a9\u062f \u062a\u062e\u0641\u06cc\u0641: win15<\/strong><\/p>\n

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\u062f\u0648\u0631\u0647 FPGA \u0645\u0642\u062f\u0645\u0627\u062a\u06cc<\/a><\/p>\n

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\u06a9\u062f \u062a\u062e\u0641\u06cc\u0641: win20<\/strong><\/p>\n

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\n","protected":false},"excerpt":{"rendered":"

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